The NSF NeTs Bulldog Mote Project project will focus on designing a new low power sensor node, Bulldog Mote, using various attractive low power techniques, such as energy harvesting, clock scheduling, dynamic voltage scheduling and low power design methods at all of WSNs multiple layers.

The subsequent comprehensive lower power design model for embedded devices will be studied and presented. Designers can evaluate and create their designs of embedded devices under tight power constrains using the procedure and methods presented in the low power design model. 

This project addresses the design and implementation of the following components:

  1. Efficient low-power methodologies implemented throughout all WSNs' design layers from the application to the physical layer
  2. A new WSN sensor node, the Bulldog Mote, created using various low power methodologies
  3. Energy harvesting technologies for sensor node architecture.

A low power design model will be created to design such embedded devices and made available to educators, students and engineers working in related areas. Furthermore, this research will provide the knowledge necessary to design enhanced sensor nodes for WSNs in terms of power consumption and communication ability. The same low-power design techniques can be used for a variety of other power constrained applications, such as consumer electronics and medical devices.